Gallium · FV-GL-HX
Gallium HX
Separate chiplet. 330-4 wrapper is a stub on first tape-out.
Controller chiplet
Editorial 12-high partner cube. FairView does not claim the 1T1C array.
| Parameter | Value |
|---|---|
| SKU | FV-GL-HX |
| Attach | Dual-mode · one credit / QoS plane |
| Attach mode | dual |
| External DQ | 2048 bits |
| Pin / identity rate | Mode selects width. First die straps H4. |
| Bandwidth / stack | 2.048 TB/s |
| First package cubes | 4 |
| First package bandwidth | 8.192 TB/s |
| Stack height | 12-hi |
| Die density | 24 Gb |
| Capacity / cube | 36 GB (= 12 × 24 / 8) |
| Capacity / package | 144 GB |
| Channels / pseudo-channels | 32 / 64 |
| tCK | Follows strapped 270-4 pin rate |
| tRFC / tREFI | not in pack — do not invent |
| VDDQ / VDDC | legal option sets only; no selected rail |
What this SKU is not
Not a Samsung 11.7 Gbps bin. Not 3.3 TB/s. Not a FairView DRAM factory. SPHBM4 46 GT/s is press-only and is not listed as a FairView lock.