Legal
Public facts only.
This website is a public product overview. It is not a JEDEC extract, not a foundry PDK, not a datasheet guarantee, and not a patent grant.
Numbers that are not in a cited public source or a founder-locked SKU are left empty. Vendor marketing pin-rates are labeled as such and are not FairView locks. Invention-disclosure families A–E are claim directions for counsel. They are not filed patents.
Export-control: an HBM4 controller plus GPU attach is likely ECCN-sensitive. This site is not a classification opinion.
Must not claim
- Invent unpublished JEDEC timings (tRFC, tREFI, tRCD, tRP, tRAS, tFAW, tCCD).
- Select a FairView VDDQ or VDDC. The legal sets are vendor-specific options.
- Lock Samsung 11.7 Gbps, SK hynix 10 GT/s, or SPHBM4 46 GT/s as FairView numbers.
- Claim FairView owns the 1T1C DRAM array or a secret cell process.
- Treat UCIe, CXL.mem, or optical I/O as on-package HBM bandwidth.
- Write 128 GB/s PCIe as if it were Gallium TB/s.
- Claim granted patents. Five families are invention-disclosure directions only.
- Quote 2 TB/s from a 1024-bit teaching lock, or confuse 8×1024 with 4×2048.